1. Technical Field
The present invention relates to an oscillator and a loop bandwidth tuning method of a phase lock loop. In particular, the present invention relates to an oscillator including a voltage controlled oscillator, the sensitivity of which changes depending on a frequency of a signal to be processed, and to a loop bandwidth tuning method of a phase lock loop having such a voltage controlled oscillator.
2. Related Art
A conventionally known phase lock loop (PLL) synchronizes a phase difference between an output signal of a voltage controlled oscillator (VCO), the frequency of which changes according to the voltage and a reference signal having a reference frequency input to the VCO, by sending feedback to the VCO. The PLL can generate a frequency-multiplied signal of the input signal, by using a frequency-divided signal of the output signal of the VCO, as a feedback signal to the VCO.
When the sensitivity of the VCO depends on frequencies, the change in oscillation frequency of the PLL will change the loop bandwidth, to change the phase noise characteristic, the spurious characteristic, and the output frequency switch time. For maintaining the loop bandwidth to be constant, the PLL is occasionally provided with a gain switcher of a loop filter. Japanese Patent Application Publication No. 2001-16102 discloses a PLL circuit having a gain switcher composed of a voltage dividing circuit and a plurality of switch elements, to switch the loop gain by switching the circuitry configuration of the voltage dividing circuit by means of the switch elements, where the voltage dividing circuit is composed of a resistance and a capacitor element.
However, the PLL circuit of Japanese Patent Application Publication No. 2001-16102 is only able to switch the loop gain discretely, and cannot optimize the gain in accordance with the oscillation frequency. If the PLL circuit is provided with a multitude of voltage dividing circuits for optimizing the gain in accordance with the oscillation frequency, the circuitry dimension becomes large. When the sensitivity of the VCO is unknown, the gain value of the voltage dividing circuit cannot be reasonably determined. Note that related arts also include Japanese Patent Application Publication No. 2006-80909, Japanese Patent Application Publication No. 2005-252930, and Japanese Patent Application Publication No. 2004-274673, in addition to Japanese Patent Application Publication No. 2001-16102 mentioned above.